Impurity analysis of the gate electrode/oxide film interface
Introducing XPS analysis using backside grinding technology!
We would like to introduce our "Impurity Analysis of the Gate Electrode/Oxide Film Interface." To investigate the distribution and bonding states of impurities at the gate electrode/gate insulating film interface, a depth resolution of less than 1 nm is required. In such cases, measurements from the backside (gate insulating film side) enable more reliable analysis. Since the detection depth of XPS is shallow, typically less than a few nm, the Si substrate portion is removed from the backside through polishing or wet etching before conducting XPS measurements. 【Information Obtained】 ■ Distribution and bonding states of impurities near the gate electrode/gate oxide film interface ■ Compositional changes near the gate electrode/gate oxide film interface ■ Band alignment, etc. *For more details, please download the PDF or feel free to contact us.
- Company：東芝ナノアナリシス
- Price：Other
